[openal] [PATCH] Add some mixer SSE2/SSE4.1/AVX optimisations
Timothy Arceri
t_arceri at yahoo.com.au
Fri Jun 6 04:02:22 EDT 2014
When SSE4.1 is enabled these changes can reduce cpu time spent in Resample_lerp32 by upto 43% during the OpenArena benchmark of the Phoronix Test Suite.
V3: wip AVX optimisation (currently causes benchmark to freeze), set caps flags individually without nested if assuming that previous extensions are available (just makes code a little nicer to read).
V2: removed obsolete UpdatePositions change, moved InitiatePositionArrays to a common location
---
Alc/ALc.c | 15 ++++++-
Alc/ALu.c | 12 +++++
Alc/helpers.c | 20 ++++-----
Alc/mixer_avx.c | 109 ++++++++++++++++++++++++++++++++++++++++++++++
Alc/mixer_defs.h | 26 +++++++++++
Alc/mixer_sse2.c | 79 +++++++++++++++++++++++++++++++++
Alc/mixer_sse41.c | 82 ++++++++++++++++++++++++++++++++++
CMakeLists.txt | 87 +++++++++++++++++++++++++++++++++++-
OpenAL32/Include/alMain.h | 4 +-
config.h.in | 3 ++
10 files changed, 423 insertions(+), 14 deletions(-)
create mode 100644 Alc/mixer_avx.c
create mode 100644 Alc/mixer_sse2.c
create mode 100644 Alc/mixer_sse41.c
diff --git a/Alc/ALc.c b/Alc/ALc.c
index 3b3e539..92f94ad 100644
--- a/Alc/ALc.c
+++ b/Alc/ALc.c
@@ -910,7 +910,16 @@ static void alc_initconfig(void)
capfilter = 0;
#ifdef HAVE_SSE
- capfilter |= CPU_CAP_SSE | CPU_CAP_SSE2;
+ capfilter |= CPU_CAP_SSE;
+#endif
+#ifdef HAVE_SSE2
+ capfilter |= CPU_CAP_SSE2;
+#endif
+#ifdef HAVE_SSE4_1
+ capfilter |= CPU_CAP_SSE4_1;
+#endif
+#ifdef HAVE_AVX
+ capfilter |= CPU_CAP_AVX;
#endif
#ifdef HAVE_NEON
capfilter |= CPU_CAP_NEON;
@@ -940,6 +949,10 @@ static void alc_initconfig(void)
capfilter &= ~CPU_CAP_SSE;
else if(len == 4 && strncasecmp(str, "sse2", len) == 0)
capfilter &= ~CPU_CAP_SSE2;
+ else if(len == 6 && strncasecmp(str, "sse4.1", len) == 0)
+ capfilter &= ~CPU_CAP_SSE4_1;
+ else if(len == 3 && strncasecmp(str, "avx", len) == 0)
+ capfilter &= ~CPU_CAP_AVX;
else if(len == 4 && strncasecmp(str, "neon", len) == 0)
capfilter &= ~CPU_CAP_NEON;
else
diff --git a/Alc/ALu.c b/Alc/ALu.c
index e661af1..0212474 100644
--- a/Alc/ALu.c
+++ b/Alc/ALu.c
@@ -91,6 +91,18 @@ static ResamplerFunc SelectResampler(enum Resampler Resampler, ALuint increment)
case PointResampler:
return Resample_point32_C;
case LinearResampler:
+#ifdef HAVE_AVX
+ if((CPUCapFlags&CPU_CAP_AVX))
+ return Resample_lerp32_AVX;
+#endif
+#ifdef HAVE_SSE4_1
+ if((CPUCapFlags&CPU_CAP_SSE4_1))
+ return Resample_lerp32_SSE41;
+#endif
+#ifdef HAVE_SSE2
+ if((CPUCapFlags&CPU_CAP_SSE2))
+ return Resample_lerp32_SSE2;
+#endif
return Resample_lerp32_C;
case CubicResampler:
return Resample_cubic32_C;
diff --git a/Alc/helpers.c b/Alc/helpers.c
index a0230b7..0fae37f 100644
--- a/Alc/helpers.c
+++ b/Alc/helpers.c
@@ -135,12 +135,10 @@ void FillCPUCaps(ALuint capfilter)
if(maxfunc >= 1 &&
__get_cpuid(1, &cpuinf[0].regs[0], &cpuinf[0].regs[1], &cpuinf[0].regs[2], &cpuinf[0].regs[3]))
{
- if((cpuinf[0].regs[3]&(1<<25)))
- {
- caps |= CPU_CAP_SSE;
- if((cpuinf[0].regs[3]&(1<<26)))
- caps |= CPU_CAP_SSE2;
- }
+ if((cpuinf[0].regs[3]&(1<<25))) caps |= CPU_CAP_SSE;
+ if((cpuinf[0].regs[3]&(1<<26))) caps |= CPU_CAP_SSE2;
+ if((cpuinf[0].regs[2]&(1<<19))) caps |= CPU_CAP_SSE4_1;
+ if((cpuinf[0].regs[2]&(1<<28))) caps |= CPU_CAP_AVX;
}
}
#elif defined(HAVE_WINDOWS_H)
@@ -164,10 +162,12 @@ void FillCPUCaps(ALuint capfilter)
caps |= CPU_CAP_NEON;
#endif
- TRACE("Got caps:%s%s%s%s\n", ((caps&CPU_CAP_SSE)?((capfilter&CPU_CAP_SSE)?" SSE":" (SSE)"):""),
- ((caps&CPU_CAP_SSE2)?((capfilter&CPU_CAP_SSE2)?" SSE2":" (SSE2)"):""),
- ((caps&CPU_CAP_NEON)?((capfilter&CPU_CAP_NEON)?" Neon":" (Neon)"):""),
- ((!caps)?" -none-":""));
+ TRACE("Got caps:%s%s%s%s%s%s\n", ((caps&CPU_CAP_SSE)?((capfilter&CPU_CAP_SSE)?" SSE":" (SSE)"):""),
+ ((caps&CPU_CAP_SSE2)?((capfilter&CPU_CAP_SSE2)?" SSE2":" (SSE2)"):""),
+ ((caps&CPU_CAP_SSE4_1)?((capfilter&CPU_CAP_SSE4_1)?" SSE4.1":" (SSE4.1)"):""),
+ ((caps&CPU_CAP_AVX)?((capfilter&CPU_CAP_AVX)?" AVX":" (AVX)"):""),
+ ((caps&CPU_CAP_NEON)?((capfilter&CPU_CAP_NEON)?" Neon":" (Neon)"):""),
+ ((!caps)?" -none-":""));
CPUCapFlags = caps & capfilter;
}
diff --git a/Alc/mixer_avx.c b/Alc/mixer_avx.c
new file mode 100644
index 0000000..bb6fdea
--- /dev/null
+++ b/Alc/mixer_avx.c
@@ -0,0 +1,109 @@
+/**
+ * OpenAL cross platform audio library
+ * Copyright (C) 1999-2014 by authors.
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Library General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU Library General Public
+ * License along with this library; if not, write to the
+ * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ * Or go to http://www.gnu.org/copyleft/lgpl.html
+ */
+
+#include "config.h"
+
+#include <immintrin.h>
+
+#include "alu.h"
+#include "mixer_defs.h"
+
+/*****************************************************************************
+*
+* Join two 128-bit vectors
+*
+*****************************************************************************/
+#define _mm256_set_m128i(hi,lo) _mm256_insertf128_si256(_mm256_castsi128_si256(lo),(hi),1)
+ // _mm256_set_m128i(hi,lo); // not defined in all versions of immintrin.h
+
+
+const ALfloat *Resample_lerp32_AVX(const ALfloat *src, ALuint frac, ALuint increment,
+ ALfloat *restrict dst, ALuint numsamples)
+{
+ ALuint i;
+ ALuint pos = 0;
+ ALuint pos_arr[8] = {0};
+ ALuint frac_arr[8] = {0};
+
+ float const fracOne = 1.0f/FRACTIONONE;
+
+ __m128i frac4_2, pos4_2, frac4_1, pos4_1;
+ __m256i frac8;
+ const __m128i increment4_4 = _mm_set1_epi32(increment*4);
+ const __m128i increment4_8 = _mm_set1_epi32(increment*8);
+ const __m256 fracOne8 = _mm256_broadcast_ss(&fracOne);
+ const __m128i fracMask4 = _mm_set1_epi32(FRACTIONMASK);
+
+ InitiatePositionArrays(frac, increment, pos, frac_arr, pos_arr, 8);
+
+ frac4_1 = _mm_set_epi32(frac_arr[3], frac_arr[2], frac_arr[1], frac_arr[0]);
+ frac4_2 = _mm_set_epi32(frac_arr[3], frac_arr[2], frac_arr[1], frac_arr[0]);
+ frac8 = _mm256_set_m128i(frac4_2, frac4_1);
+ pos4_1 = _mm_set_epi32(pos_arr[3], pos_arr[2], pos_arr[1], pos_arr[0]);
+ pos4_2 = _mm_set_epi32(pos_arr[7], pos_arr[6], pos_arr[5], pos_arr[4]);
+
+ for(i = 0;i < numsamples-7;i += 8)
+ {
+ __m256 val1 = _mm256_set_ps(src[pos_arr[7]], src[pos_arr[6]], src[pos_arr[5]], src[pos_arr[4]],
+ src[pos_arr[3]], src[pos_arr[2]], src[pos_arr[1]], src[pos_arr[0]]);
+ __m256 val2 = _mm256_set_ps(src[pos_arr[7]+1], src[pos_arr[6]+1], src[pos_arr[5]+1], src[pos_arr[4]+1],
+ src[pos_arr[3]+1], src[pos_arr[2]+1], src[pos_arr[1]+1], src[pos_arr[0]+1]);
+
+ /* val1 + (val2-val1)*mu */
+ const __m256 r0 = _mm256_sub_ps(val2, val1);
+ const __m256 mu = _mm256_mul_ps(_mm256_cvtepi32_ps(frac8), fracOne8);
+ const __m256 r1 = _mm256_mul_ps(mu, r0);
+ const __m256 out = _mm256_add_ps(val1, r1);
+
+ _mm256_store_ps(&dst[i], out);
+
+ frac4_1 = _mm_add_epi32(frac4_1, increment4_8);
+ pos4_1 = _mm_add_epi32(pos4_1, _mm_srli_epi32(frac4_1, FRACTIONBITS));
+ frac4_1 = _mm_and_si128(frac4_1, fracMask4);
+
+ frac4_2 = _mm_add_epi32(frac4_1, increment4_4);
+ pos4_2 = _mm_add_epi32(pos4_2, _mm_srli_epi32(frac4_2, FRACTIONBITS));
+ frac4_2 = _mm_and_si128(frac4_2, fracMask4);
+
+ frac8 = _mm256_set_m128i(frac4_2, frac4_1);
+
+ pos_arr[0] = _mm_extract_epi32(pos4_1, 0);
+ pos_arr[1] = _mm_extract_epi32(pos4_1, 1);
+ pos_arr[2] = _mm_extract_epi32(pos4_1, 2);
+ pos_arr[3] = _mm_extract_epi32(pos4_1, 3);
+ pos_arr[4] = _mm_extract_epi32(pos4_2, 0);
+ pos_arr[5] = _mm_extract_epi32(pos4_2, 1);
+ pos_arr[6] = _mm_extract_epi32(pos4_2, 2);
+ pos_arr[7] = _mm_extract_epi32(pos4_2, 3);
+ }
+
+ pos = pos_arr[0];
+ frac = _mm_cvtsi128_si32(_mm256_extractf128_si256(frac8, 0));
+
+ for(;i < numsamples;i++)
+ {
+ dst[i] = lerp(src[pos], src[pos+1], frac * (1.0f/FRACTIONONE));
+
+ frac += increment;
+ pos += frac>>FRACTIONBITS;
+ frac &= FRACTIONMASK;
+ }
+ return dst;
+}
diff --git a/Alc/mixer_defs.h b/Alc/mixer_defs.h
index 04fd1f5..407e0a7 100644
--- a/Alc/mixer_defs.h
+++ b/Alc/mixer_defs.h
@@ -42,6 +42,32 @@ void MixSend_SSE(ALfloat (*restrict OutBuffer)[BUFFERSIZE], const ALfloat *data,
struct MixGainMono *Gain, ALuint Counter, ALuint OutPos,
ALuint BufferSize);
+/* SSE resamplers */
+const ALfloat *Resample_lerp32_SSE2(const ALfloat *src, ALuint frac, ALuint increment,
+ ALfloat *restrict dst, ALuint numsamples);
+const ALfloat *Resample_lerp32_SSE41(const ALfloat *src, ALuint frac, ALuint increment,
+ ALfloat *restrict dst, ALuint numsamples);
+const ALfloat *Resample_lerp32_AVX(const ALfloat *src, ALuint frac, ALuint increment,
+ ALfloat *restrict dst, ALuint numsamples);
+
+/* SSE helpers */
+static inline void InitiatePositionArrays(ALuint frac, ALuint increment, ALuint pos,
+ ALuint *frac_arr, ALuint *pos_arr, ALuint size)
+{
+ ALuint frac_tmp;
+ ALuint i;
+
+ pos_arr[0] = pos;
+ frac_arr[0] = frac;
+
+ /* setup pos and frac arrays */
+ for (i=0;i < size-2; i++) {
+ frac_tmp = frac_arr[i] + increment;
+ pos_arr[i+1] = pos_arr[i] + (frac_tmp>>FRACTIONBITS);
+ frac_arr[i+1] = frac_tmp & FRACTIONMASK;
+ }
+}
+
/* Neon mixers */
void MixDirect_Hrtf_Neon(ALfloat (*restrict OutBuffer)[BUFFERSIZE], const ALfloat *data,
ALuint Counter, ALuint Offset, ALuint OutPos, const ALuint IrSize,
diff --git a/Alc/mixer_sse2.c b/Alc/mixer_sse2.c
new file mode 100644
index 0000000..40d7c91
--- /dev/null
+++ b/Alc/mixer_sse2.c
@@ -0,0 +1,79 @@
+/**
+ * OpenAL cross platform audio library
+ * Copyright (C) 1999-2014 by authors.
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Library General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU Library General Public
+ * License along with this library; if not, write to the
+ * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ * Or go to http://www.gnu.org/copyleft/lgpl.html
+ */
+
+#include "config.h"
+
+#include <emmintrin.h>
+
+#include "alu.h"
+#include "mixer_defs.h"
+
+
+const ALfloat *Resample_lerp32_SSE2(const ALfloat *src, ALuint frac, ALuint increment,
+ ALfloat *restrict dst, ALuint numsamples)
+{
+ ALuint i;
+ ALuint pos = 0;
+ ALuint pos_arr[4] = {0};
+ ALuint frac_arr[4] = {0};
+
+ __m128i frac4, pos4;
+ const __m128i increment4 = _mm_set1_epi32(increment*4);
+ const __m128 fracOne4 = _mm_set1_ps(1.0f/FRACTIONONE);
+ const __m128i fracMask4 = _mm_set1_epi32(FRACTIONMASK);
+
+ InitiatePositionArrays(frac, increment, pos, frac_arr, pos_arr, 4);
+
+ frac4 = _mm_set_epi32(frac_arr[3], frac_arr[2], frac_arr[1], frac_arr[0]);
+ pos4 = _mm_set_epi32(pos_arr[3], pos_arr[2], pos_arr[1], pos_arr[0]);
+
+ for(i = 0;i < numsamples-3;i += 4)
+ {
+ __m128 val1 = _mm_set_ps(src[pos_arr[3]], src[pos_arr[2]], src[pos_arr[1]], src[pos_arr[0]]);
+ __m128 val2 = _mm_set_ps(src[pos_arr[3]+1], src[pos_arr[2]+1], src[pos_arr[1]+1], src[pos_arr[0]+1]);
+
+ /* val1 + (val2-val1)*mu */
+ const __m128 r0 = _mm_sub_ps(val2, val1);
+ const __m128 mu = _mm_mul_ps(_mm_cvtepi32_ps(frac4), fracOne4);
+ const __m128 r1 = _mm_mul_ps(mu, r0);
+ const __m128 out = _mm_add_ps(val1, r1);
+
+ _mm_store_ps(&dst[i], out);
+
+ frac4 = _mm_add_epi32(frac4, increment4);
+ pos4 = _mm_add_epi32(pos4, _mm_srli_epi32(frac4, FRACTIONBITS));
+ frac4 = _mm_and_si128(frac4, fracMask4);
+
+ _mm_store_ps((float*)pos_arr, _mm_castsi128_ps(pos4));
+ }
+
+ pos = pos_arr[0];
+ frac = _mm_cvtsi128_si32(frac4);
+
+ for(;i < numsamples;i++)
+ {
+ dst[i] = lerp(src[pos], src[pos+1], frac * (1.0f/FRACTIONONE));
+
+ frac += increment;
+ pos += frac>>FRACTIONBITS;
+ frac &= FRACTIONMASK;
+ }
+ return dst;
+}
diff --git a/Alc/mixer_sse41.c b/Alc/mixer_sse41.c
new file mode 100644
index 0000000..f9c6776
--- /dev/null
+++ b/Alc/mixer_sse41.c
@@ -0,0 +1,82 @@
+/**
+ * OpenAL cross platform audio library
+ * Copyright (C) 1999-2014 by authors.
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Library General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU Library General Public
+ * License along with this library; if not, write to the
+ * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ * Or go to http://www.gnu.org/copyleft/lgpl.html
+ */
+
+#include "config.h"
+
+#include <smmintrin.h>
+
+#include "alu.h"
+#include "mixer_defs.h"
+
+
+const ALfloat *Resample_lerp32_SSE41(const ALfloat *src, ALuint frac, ALuint increment,
+ ALfloat *restrict dst, ALuint numsamples)
+{
+ ALuint i;
+ ALuint pos = 0;
+ ALuint pos_arr[4] = {0};
+ ALuint frac_arr[4] = {0};
+
+ __m128i frac4, pos4;
+ const __m128i increment4 = _mm_set1_epi32(increment*4);
+ const __m128 fracOne4 = _mm_set1_ps(1.0f/FRACTIONONE);
+ const __m128i fracMask4 = _mm_set1_epi32(FRACTIONMASK);
+
+ InitiatePositionArrays(frac, increment, pos, frac_arr, pos_arr, 4);
+
+ frac4 = _mm_set_epi32(frac_arr[3], frac_arr[2], frac_arr[1], frac_arr[0]);
+ pos4 = _mm_set_epi32(pos_arr[3], pos_arr[2], pos_arr[1], pos_arr[0]);
+
+ for(i = 0;i < numsamples-3;i += 4)
+ {
+ __m128 val1 = _mm_set_ps(src[pos_arr[3]], src[pos_arr[2]], src[pos_arr[1]], src[pos_arr[0]]);
+ __m128 val2 = _mm_set_ps(src[pos_arr[3]+1], src[pos_arr[2]+1], src[pos_arr[1]+1], src[pos_arr[0]+1]);
+
+ /* val1 + (val2-val1)*mu */
+ const __m128 r0 = _mm_sub_ps(val2, val1);
+ const __m128 mu = _mm_mul_ps(_mm_cvtepi32_ps(frac4), fracOne4);
+ const __m128 r1 = _mm_mul_ps(mu, r0);
+ const __m128 out = _mm_add_ps(val1, r1);
+
+ _mm_store_ps(&dst[i], out);
+
+ frac4 = _mm_add_epi32(frac4, increment4);
+ pos4 = _mm_add_epi32(pos4, _mm_srli_epi32(frac4, FRACTIONBITS));
+ frac4 = _mm_and_si128(frac4, fracMask4);
+
+ pos_arr[0] = _mm_extract_epi32(pos4, 0);
+ pos_arr[1] = _mm_extract_epi32(pos4, 1);
+ pos_arr[2] = _mm_extract_epi32(pos4, 2);
+ pos_arr[3] = _mm_extract_epi32(pos4, 3);
+ }
+
+ pos = pos_arr[0];
+ frac = _mm_cvtsi128_si32(frac4);
+
+ for(;i < numsamples;i++)
+ {
+ dst[i] = lerp(src[pos], src[pos+1], frac * (1.0f/FRACTIONONE));
+
+ frac += increment;
+ pos += frac>>FRACTIONBITS;
+ frac &= FRACTIONMASK;
+ }
+ return dst;
+}
diff --git a/CMakeLists.txt b/CMakeLists.txt
index bc0f51d..9936c05 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -300,6 +300,9 @@ ELSE()
ENDIF()
SET(SSE_SWITCH "")
+SET(SSE2_SWITCH "")
+SET(SSE4_1_SWITCH "")
+SET(AVX_SWITCH "")
IF(MSVC)
CHECK_C_COMPILER_FLAG(/arch:SSE HAVE_ARCHSSE_SWITCH)
IF(HAVE_ARCHSSE_SWITCH)
@@ -312,6 +315,24 @@ IF(NOT SSE_SWITCH)
SET(SSE_SWITCH "-msse")
ENDIF()
ENDIF()
+IF(NOT SSE2_SWITCH)
+ CHECK_C_COMPILER_FLAG(-msse2 HAVE_MSSE2_SWITCH)
+ IF(HAVE_MSSE2_SWITCH)
+ SET(SSE2_SWITCH "-msse2")
+ ENDIF()
+ENDIF()
+IF(NOT SSE4_1_SWITCH)
+ CHECK_C_COMPILER_FLAG(-msse4.1 HAVE_MSSE4_1_SWITCH)
+ IF(HAVE_MSSE4_1_SWITCH)
+ SET(SSE4_1_SWITCH "-msse4.1")
+ ENDIF()
+ENDIF()
+IF(NOT AVX_SWITCH)
+ CHECK_C_COMPILER_FLAG(-mavx HAVE_MAVX_SWITCH)
+ IF(HAVE_MAVX_SWITCH)
+ SET(AVX_SWITCH "-mavx")
+ ENDIF()
+ENDIF()
CHECK_C_SOURCE_COMPILES("int foo(const char *str, ...) __attribute__((format(printf, 1, 2)));
int main() {return 0;}" HAVE_GCC_FORMAT)
@@ -547,13 +568,15 @@ SET(ALC_OBJS Alc/ALc.c
SET(CPU_EXTS "Default")
SET(HAVE_SSE 0)
+SET(HAVE_SSE2 0)
+SET(HAVE_SSE4_1 0)
SET(HAVE_NEON 0)
# Check for SSE support
-OPTION(ALSOFT_REQUIRE_SSE "Require SSE/SSE2 support" OFF)
+OPTION(ALSOFT_REQUIRE_SSE "Require SSE support" OFF)
CHECK_INCLUDE_FILE(xmmintrin.h HAVE_XMMINTRIN_H "${SSE_SWITCH}")
IF(HAVE_XMMINTRIN_H)
- OPTION(ALSOFT_CPUEXT_SSE "Enable SSE/SSE2 support" ON)
+ OPTION(ALSOFT_CPUEXT_SSE "Enable SSE support" ON)
IF(ALSOFT_CPUEXT_SSE)
IF(ALIGN_DECL OR HAVE_C11_ALIGNAS)
SET(HAVE_SSE 1)
@@ -570,6 +593,66 @@ IF(ALSOFT_REQUIRE_SSE AND NOT HAVE_SSE)
MESSAGE(FATAL_ERROR "Failed to enabled required SSE CPU extensions")
ENDIF()
+OPTION(ALSOFT_REQUIRE_SSE2 "Require SSE2 support" OFF)
+CHECK_INCLUDE_FILE(emmintrin.h HAVE_EMMINTRIN_H "${SSE2_SWITCH}")
+IF(HAVE_EMMINTRIN_H)
+ OPTION(ALSOFT_CPUEXT_SSE2 "Enable SSE2 support" ON)
+ IF(ALSOFT_CPUEXT_SSE2)
+ IF(ALIGN_DECL OR HAVE_C11_ALIGNAS)
+ SET(HAVE_SSE2 1)
+ SET(ALC_OBJS ${ALC_OBJS} Alc/mixer_sse2.c)
+ IF(SSE2_SWITCH)
+ SET_SOURCE_FILES_PROPERTIES(Alc/mixer_sse2.c PROPERTIES
+ COMPILE_FLAGS "${SSE2_SWITCH}")
+ ENDIF()
+ SET(CPU_EXTS "${CPU_EXTS}, SSE2")
+ ENDIF()
+ ENDIF()
+ENDIF()
+IF(ALSOFT_REQUIRE_SSE2 AND NOT HAVE_SSE2)
+ MESSAGE(FATAL_ERROR "Failed to enabled required SSE2 CPU extensions")
+ENDIF()
+
+OPTION(ALSOFT_REQUIRE_SSE4_1 "Require SSE4.1 support" OFF)
+CHECK_INCLUDE_FILE(smmintrin.h HAVE_SMMINTRIN_H "${SSE4_1_SWITCH}")
+IF(HAVE_SMMINTRIN_H)
+ OPTION(ALSOFT_CPUEXT_SSE4_1 "Enable SSE4.1 support" ON)
+ IF(ALSOFT_CPUEXT_SSE4_1)
+ IF(ALIGN_DECL OR HAVE_C11_ALIGNAS)
+ SET(HAVE_SSE4_1 1)
+ SET(ALC_OBJS ${ALC_OBJS} Alc/mixer_sse41.c)
+ IF(SSE4_1_SWITCH)
+ SET_SOURCE_FILES_PROPERTIES(Alc/mixer_sse41.c PROPERTIES
+ COMPILE_FLAGS "${SSE4_1_SWITCH}")
+ ENDIF()
+ SET(CPU_EXTS "${CPU_EXTS}, SSE4.1")
+ ENDIF()
+ ENDIF()
+ENDIF()
+IF(ALSOFT_REQUIRE_SSE4_1 AND NOT HAVE_SSE4_1)
+ MESSAGE(FATAL_ERROR "Failed to enabled required SSE4.1 CPU extensions")
+ENDIF()
+
+OPTION(ALSOFT_REQUIRE_AVX "Require AVX support" OFF)
+CHECK_INCLUDE_FILE(immintrin.h HAVE_IMMINTRIN_H "${AVX_SWITCH}")
+IF(HAVE_IMMINTRIN_H)
+ OPTION(ALSOFT_CPUEXT_AVX "Enable AVX support" ON)
+ IF(ALSOFT_CPUEXT_AVX)
+ IF(ALIGN_DECL OR HAVE_C11_ALIGNAS)
+ SET(HAVE_AVX 1)
+ SET(ALC_OBJS ${ALC_OBJS} Alc/mixer_avx.c)
+ IF(AVX_SWITCH)
+ SET_SOURCE_FILES_PROPERTIES(Alc/mixer_avx.c PROPERTIES
+ COMPILE_FLAGS "${AVX_SWITCH}")
+ ENDIF()
+ SET(CPU_EXTS "${CPU_EXTS}, AVX")
+ ENDIF()
+ ENDIF()
+ENDIF()
+IF(ALSOFT_REQUIRE_SSE4_1 AND NOT HAVE_SSE4_1)
+ MESSAGE(FATAL_ERROR "Failed to enabled required SSE4.1 CPU extensions")
+ENDIF()
+
# Check for ARM Neon support
OPTION(ALSOFT_REQUIRE_NEON "Require ARM Neon support" OFF)
CHECK_INCLUDE_FILE(arm_neon.h HAVE_ARM_NEON_H)
diff --git a/OpenAL32/Include/alMain.h b/OpenAL32/Include/alMain.h
index 57b0811..b4e9fe6 100644
--- a/OpenAL32/Include/alMain.h
+++ b/OpenAL32/Include/alMain.h
@@ -887,7 +887,9 @@ extern ALuint CPUCapFlags;
enum {
CPU_CAP_SSE = 1<<0,
CPU_CAP_SSE2 = 1<<1,
- CPU_CAP_NEON = 1<<2,
+ CPU_CAP_SSE4_1 = 1<<2,
+ CPU_CAP_AVX = 1<<3,
+ CPU_CAP_NEON = 1<<4,
};
void FillCPUCaps(ALuint capfilter);
diff --git a/config.h.in b/config.h.in
index 090c00a..2eb1c0a 100644
--- a/config.h.in
+++ b/config.h.in
@@ -25,6 +25,9 @@
/* Define if we have SSE CPU extensions */
#cmakedefine HAVE_SSE
+#cmakedefine HAVE_SSE2
+#cmakedefine HAVE_SSE4_1
+#cmakedefine HAVE_AVX
/* Define if we have ARM Neon CPU extensions */
#cmakedefine HAVE_NEON
--
1.9.0
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